Interrupt Vector; Table 7.3A Mb90580 Interrupt Assignment Table (1/2) - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

7.3 Interrupt Vector

Software interrupt
Vector address L
instruction
FFFFFC
INT 0
FFFFE0
INT 7
FFFFDC
INT 8
FFFFD8
INT 9
FFFFD4
INT 10
FFFFD0
INT 11
FFFFCC
INT 12
FFFFC8
INT 13
FFFFC4
INT 14
FFFFC0
INT 15
FFFFBC
INT 16
FFFFB8
INT 17
FFFFB4
INT 18
FFFFB0
INT 19
FFFFAC
INT 20
FFFFA8
INT 21
FFFFA4
INT 22
FFFFA0
INT 23
FFFF9C
INT 24
FFFF98
INT 25
FFFF94
INT 26
FFFF90
INT 27
FFFF8C
INT 28
FFFF88
INT 29
FFFF84
INT 30
FFFF80
INT 31
FFFF7C
INT 32
FFFF78
INT 33
FFFF74
INT 34
FFFF70
INT 35
FFFF6C
INT 36
FFFF68
INT 37
FFFF64
INT 38
FFFF60
INT 39
FFFF5C
INT 40
FFFF58
INT 41
FFFF54
INT 42
MB90580 Series

Table 7.3a MB90580 interrupt assignment table (1/2)

Vector address M
FFFFFD
H H
FFFFE1
H H
FFFFDD
H H
FFFFD9
H H
FFFFD5
H H
FFFFD1
H H
FFFFCD
H H
FFFFC9
H H
FFFFC5
H H
FFFFC1
H H
FFFFBD
H H
FFFFB9
H H
FFFFB5
H H
FFFFB1
H H
FFFFAD
H H
FFFFA9
H H
FFFFA5
H H
FFFFA1
H H
FFFF9D
H H
FFFF99
H H
FFFF95
H H
FFFF91
H H
FFFF8D
H H
FFFF89
H H
FFFF85
H H
FFFF81
H H
FFFF7D
H H
FFFF79
H H
FFFF75
H H
FFFF71
H H
FFFF6D
H H
FFFF69
H H
FFFF65
H H
FFFF61
H H
FFFF5
H H
FFFF59
H H
FFFF55
H H
Mode
Vector address H
register
FFFFFE
Unused
H
FFFFE2
Unused
H
FFFFDE
FFFFDF
H
FFFFDA
Unused
H
FFFFD6
Unused
H
FFFFD2
Unused
H
FFFFCE
Unused
H
FFFFCA
H
Unused
FFFFC6
H
Unused
FFFFC2
H
Unused
FFFFBE
H
Unused
FFFFBA
Unused
H
FFFFB6
Unused
H
FFFFB2
Unused
H
FFFFAE
Unused
H
FFFFAA
Unused
H
FFFFA6
Unused
H
FFFFA2
Unused
H
FFFF9E
Unused
H
FFFF9A
Unused
H
FFFF96
Unused
H
FFFF92
Unused
H
FFFF8E
Unused
H
FFFF8A
Unused
H
FFFF86
Unused
H
FFFF82
Unused
H
FFFF7E
Unused
H
FFFF7A
Unused
H
FFFF76
Unused
H
FFFF72
Unused
H
FFFF6E
Unused
H
FFFF6A
Unused
H
FFFF66
Unused
H
FFFF62
Unused
H
FFFF5E
Unused
H
FFFF5A
Unused
H
FFFF56
Unused
H
7.3 Interrupt Vector
Interrupt
Hardware interrupt
No.
None
#0
None
#7
(RESET vector)
#8
None
#9
<Exception>
#10
A/D
#11
Time base Timer
#12
DTP0 (External interrupt #0) /
#13
UART3 reception completion
DTP1 (External interrupt #1) /
#14
UART4 reception completion
DTP2 (External interrupt #2) /
#15
UART3 transmission completion
DTP3 (External interrupt #3) /
#16
UART4 transmission completion
DTP4 - 7 (External interrupt #4 - #7)
#17
Output compare (channel 1)
#18
UART2 reception completion
#19
UART1 reception completion
#20
Input capture (channel 3)
#21
Input capture (channel 2)
#22
Input capture (channel 1)
#23
Input capture (channel 0)
#24
8/16-bit PPG0 counter borrow
#25
16-bit reload timer 2 - 0
#26
Time prescalar
#27
Output compare (channel 0)
#28
UART2 transmission completion
#29
PWC timer
#30
UART1 transmission completion
#31
16-bit free run timer overflow
#32
UART0 transmission completion
#33
8/16 bit PPG 1 counter borrow
#34
IEBus reception completion
#35
None
#36
IEBus transmission completion
#37
None
#38
UART0 reception completion
#39
None
#40
(RESERVED)
#41
Delayed interrupt
#42
Chapter 7: Interrupt 83