Figure 2.1.3A Interrupt Disable Instruction - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

Common register bank prefix (CMR)
To simplify data exchange between multiple tasks, the same register bank must be accessed relatively
easily regardless of the RP value. When CMR is placed before an instruction that accesses a register
bank, that instruction accesses the common bank (the register bank selected when RP=0) at addresses
from 000180H to 00018FH regardless of the current RP value. Use the following instructions with care:
(1)String instructions (MOVS, MOVSW, SCEQ, SCWEQ, FILS, FILSW)
If an interrupt request occurs during execution of a string instruction with a prefix code, the prefix code
becomes invalid when the string instruction is resumed after the interrupt is processed. Thus, the string
instruction is executed falsely after the interrupt is processed. Do not prefix any of the above string
instructions with CMR.
(2)Flag change instructions (AND CCR,#imm8, OR CCR,#imm8, POPW PS)
The instruction is executed normally, but the prefix affects the next instruction.
(3)MOV ILM,#imm8
The instruction is executed normally, but the prefix affects the next instruction.
Flag change disable prefix
To disable flag changes, use the flag change disable prefix code (NCC). Placing NCC before an instruction
disables flag changes associated with that instruction. Use the following instructions with care:
(1) String instructions (MOVS, MOVSW, SCEQ, SCWEQ, FILS, FILSW)
If an interrupt request occurs during execution of a string instruction with a prefix code, the prefix code
becomes invalid when the string instruction is resumed after the interrupt is processed. Thus, the string
instruction is executed incorrectly after the interrupt is processed. Do not prefix any of the above string
instructions with NCC.
(2) Flag change instructions (AND CCR,#imm8, OR CCR,#imm8, POPW PS)
The instruction is executed normally, but the prefix affects the next instruction.
(3)Interrupt instructions (INT #vct8, INT9, INT addr16, INTP addr24, RETI)
CCR changes according to the instruction specifications regardless of the prefix.
(4)JCTX @A
CCR changes according to the instruction specifications regardless of the prefix.
(5)MOV ILM,#imm8
The instruction is executed normally, but the prefix affects the next instruction.
Interrupt disable instructions
Interrupt requests are not sampled for the following ten instructions:
• MOV ILM,#imm8
• AND CCR,#imm8
If a valid interrupt request occurs during execution of any of the above instructions, the interrupt can be
processed only when an instruction other than the above is executed. For details, see Figure 2.1.3a.
MB90580 Series
• PCB • SPB
• ADB • CMR
Interrupt disable instruction
• • • • • • • •
Interrupt request

Figure 2.1.3a Interrupt disable instruction

• OR CCR,#imm8 • NCC
•POPW PS • DTB
(a)
Interrupt acceptance
2.1 CPU
• • •
(a) Ordinary
instruction
Chapter 2: CPU 29