Fujitsu F2MC-16LX MB90580 Series Hardware Manual page 14

Figure 15.4.7a Counter State Transitions ......................................................................................... 218
Chapter 16 A/D Converter ..............................................................................................................................219
Figure 16.2a Block Diagram of A/D converter................................................................................... 220
Figure 16.3a Registers of A/D Converter .......................................................................................... 221
Figure 16.3.1a Control Status Registers ........................................................................................... 222
Figure 16.3.2a Data Registers .......................................................................................................... 226
Figure 16.4a Flow chart of A/D Conversion ...................................................................................... 229
Figure 16.4b Flow Chart of Data Protection Function ....................................................................... 233
Chapter 17 D/A Converter ..............................................................................................................................235
Figure 17.2a Block Diagram of D/A Cobverter .................................................................................. 236
Figure 17.3a Register of D/A Converter ............................................................................................ 237
Chapter 18 Pulse Width Counter (PWC) Timer ............................................................................................241
Figure 18.2a lock Diagram of Pulse Width Counter Timer ................................................................ 242
Figure 18.3a Register of Pulse Width Counter Timer ....................................................................... 243
Figure 18.4a Timer Operation (Single-Shot Mode) ........................................................................... 252
Figure 18.4b Timer Operation (Reload Mode) .................................................................................. 252
Figure 18.4c Pulse Width Count Operation (Single-Shot Count Mode, "H" Width Count Mode) ...... 253
Figure 18.4d Pulse Width Count Operation (Continuous Count Mode, "H" Width Count Mode) ...... 253
Figure 18.4e Operation Mode Selection ........................................................................................... 255
Figure 18.4f Flowchart of Timer Mode Operation ............................................................................. 259
Figure 18.4g Flowchart of Operation in Pulse Width Count Mode .................................................... 264
Chapter 19 Clock Monitor Function ..............................................................................................................267
Figure 19.2a Block Diagram of Clock Monitor Function ................................................................... 267
Figure 19.3a Registers of Clock Monitor Function ............................................................................ 268
Chapter 20 16-Bit I/O Timer ...........................................................................................................................269
Figure 20.2.1a Overall Block diagram of 16-bit I/O Timer ................................................................. 271
Figure 20.2.2a Block diagram of 16-bit free-run timer....................................................................... 272
Figure 20.2.3a Block diagram of Output Comparison ....................................................................... 272
Figure 20.2.4a Block diagram of Input Capture ................................................................................ 273
Figure 20.3.1a Registers of 16-bit free-run timer .............................................................................. 274
Figure 20.3.2a Registers of output comparsion ................................................................................ 278
Figure 20.3.3a Register of input capture ........................................................................................... 282
Chapter 21 ROM Correction Module .............................................................................................................291
Figure 21.2a Block Diagram of ROM Correction Module .................................................................. 291
Figure 21.3a Registers of ROM Correction Module .......................................................................... 292
Figure 21.5a System Structure Example ......................................................................................... 295
Figure 21.5b ROM Correction Processing Example ......................................................................... 296
Figure 21.5c ROM Correction Processing Flow Diagram ................................................................. 297
Chapter 22 ROM Mirroring Module ...............................................................................................................299
xiv MB90580 Series