Fujitsu F2MC-16LX MB90580 Series Hardware Manual page 303

20.3.3.1 Input capture data register
Input Capture Data Register 0, 1, 2, 3
Address: 000061
H
000063
H
000065
H
000067
H
Read/write
Initial value
Address: 000060
000062
000064
000066
Read/write
Initial value
This register stores the 16-bit timer value when a valid edge of the corresponding external pin input wave-
form is detected. (This register must be accessed in word mode. No value can be written to this register.)
MB90580 Series
15 14 13
CP15 CP14 CP13
R R R
X X X
H 7 6
H
H
CP07 CP06
H
R R
X X
12 11 10
CP12 CP12 CP11
R R R
X X X
5 4 3
CP05 CP04 CP03
R R R
X X X
20.3 Registers and Register Details
9 8 Bit Number
IPCP0 (Upper)
CP09 CP08
IPCP1 (Upper)
IPCP2 (Upper)
R R
IPCP3 (Upper)
X X
2 1 0
CP02 CP01 CP00
R R R
X X X
Chapter 20: 16-Bit I/O Timer
Bit Number
IPCP0 (Lower)
IPCP1 (Lower)
IPCP2 (Lower)
IPCP3 (Lowerr)
283