Handling The Device; Figure 1.6A Using External Clock; Figure 1.6B Connection Of Power Pins - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

1.6 Handling the Device

1.6 Handling the Device
(1) Preventing latch-up
CMOS IC chips may suffer latch-up under the following conditions:
A voltage higher than Vcc or lower than Vss is applied to an input or output pin.
A voltage higher than the rated voltage is applied between Vcc and Vss.
The AVcc power supply is applied before the Vcc voltage.
Latch-up may increase the power supply current drastically, causing thermal damage to the device.
(2) Handling unused input pins
Do not leave unused input pins open, as doing so may cause misoperation of the device. Use a pull-up or
pull-down resistor.
(3) Using external clock
To use external clock, drive the X0 and X1 pins in reverse phase.
Figure 1.6a is a diagram of how to use external clock..
(4) Power supply pins (Vcc/Vss)
Ensure that all Vcc-level power supply pins are at the same potential. In addition, ensure the same for all
Vss-level power supply pins. (See the figure below.) If there are more than one Vcc or Vss system, the
device may operate incorrectly even within the guaranteed operating range.
14 Chapter 1: Overview

Figure 1.6a Using external clock

Vcc
Vss
Vss
MB90580
Vcc
Series
Vcc
Vss

Figure 1.6b Connection of Power pins

MB90580 Series
X0
X1
Vcc
Vss
Vcc
Vss
MB90580 series