Fujitsu F2MC-16LX MB90580 Series Hardware Manual page 250

16.4 Operations
Usage
Starting I
•To terminate conversion after analog inputs AN1 to AN3 are converted
•To transfer conversion data sequentially to addresses 200H to 206H
•To start conversion by software
•To use the highest interrupt level
2
I OS setting
MOV
MOV
MOV
MOV
MOV
MOV
MOV
A/D converter setting
MOV
MOV
Interrupt sequence
RETI
Specifies the highest interrupt level, I2OS activation upon an interrupt, and the descriptor address.
Specifies the transfer destination address of converted data.
Specifies word data transfer. The transfer destination address is incremented after transfer. Data is
transferred from I/O to memory. Transfer is terminated in response to a request from a resource.
2
I OS transfer is performed three times. This count is the same as the conversion count.
Specifies single mode, start channel AN1, and end channel AN3.
Specifies activation by software and start of A/D conversion.
Specifies return from an interrupt.
ICR3
BAPL : Buffer address pointer, low-order
BAPM : Buffer address pointer, medium-order
BAPH : Buffer address pointer, high-order
ISCS
I/OA
DCT
Activation
230 Chapter 16: A/D Converter
2
OS in single mode
ICR3 #08H
BAPL, #00H
BAPM, #02H
BAPH, #00H
ISCS, #18H
IOA, #38H
DCT, #03H
ADCS1 #0BH
ADCS2 #A2H
: Interrupt control register
2
: I OS status register
: I/O address counter
: Data counter
AN1 → Interrupt → I
AN2 → Interrupt → I
AN3 → Interrupt → I
End Interrupt sequenc
Parallel processing
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2
OS transfer
2
OS transfer
2
OS transfer
MB90580 Series