Adcr1 And Adcr0 (Data Registers); Figure 16.3.2A Data Registers - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

16.3 Registers and Register Details

16.3.2 ADCR1 and ADCR0 (Data registers)

Data Registers (Upper Byte)
Address : 000039
Read/write
Initial value
Data Registers (Lower Byte)
Address : 000038
Read/write
Initial value
[bit 15]
This is reserved bit. This bit should be written to '1' before AD conversion. Never write '0' to this bit.
Note: Reading this bit always returns "1".
[bit 14, 13] : ST1, ST0 (Sampling Time)
These bits is used for setting the sampling time in terms of machine cycle.
ST1
0
0
1
1
Note: Reading these bits always return "1".
226 Chapter 16: A/D Converter
15 14
Reserved
ST1
H
(W) (W)
(0) (0)
7 6
D7 D6
H
(R) (R)
(X) (X)

Figure 16.3.2a Data Registers

Sampling time machine
ST0
cycle
0 64 machine cycle
1
0
1 4096 machine cycle
13 12 11
ST0 CT1 CT0
(W) (W) (W)
(0) (0) (1)
5 4 3
D5 D4 D3
(R) (R) (R)
(X) (X) (X)
4ms at 16MHz machine clock
Reserved
Reserved
256ms at 16MHz machine
10 9 8
D9 D8
( ) (R) (R)
( ) (X) (X)
2 1 0
ADCR1
D2 D1 D0
(R) (R) (R)
(X) (X) (X)
Sampling time
clock
MB90580 Series
Bit number
ADCR2
Bit number