Input Capture; Figure 20.3.3A Register Of Input Capture - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

20.3 Registers and Register Details

20.3.3 Input capture

This module detects a rising or falling edge or both edges of an externally input signal and stores the 16-bit
free-run timer value in a register. In addition, this module can generate an interrupt upon detection of an
edge. The input capture module consists of an input capture data register and a control register. Each
input capture has a corresponding external input pin.
• The detection edge of an external input can be selected from three types.
• Rising edge, falling edge, or both edges
• An interrupt can be generated upon detection of a valid edge of an external input.
Input Capture Data Register 0, 1, 2, 3
Address: 000061
H
000063
H
000065
H
CP15
000067
H
Read/write
Initial value
Address: 000060
000062
000064
000066
Read/write
Initial value
Input Capture Control Status Register ch0,1 & Ch2,3
Address: 000068
H
00006A
H
Read/write
Initial value
282 Chapter 20: 16-Bit I/O Timer
15 14 13
CP14 CP13 CP12
R R R
X X X
H
7 6
H
H
CP07 CP06
H
R R
X X
7 6 5
ICP1 ICP0 ICE1
R/W R/W R/W
0 0 0

Figure 20.3.3a Register of input capture

12 11 10 9
CP12 CP11 CP09
R R R
X X X
5 4 3
CP05 CP04 CP03
R R R
X X X
4 3
ICE0 EG11 EG10
R/W R/W R/W
0 0
8
Bit Number
IPCP0 (Upper)
CP08
IPCP1 (Upper)
IPCP2 (Upper)
R R
IPCP3 (Upper)
X X
2 1 0
IPCP0 (Lower)
CP02 CP01 CP00
IPCP1 (Lower)
IPCP2 (Lower)
R R R
IPCP3 (Lowerr)
X X X
2 1 0
EG01 EG00
R/W R/W
0 0 0
Bit Number
Bit Number
ICS01
ICS23
MB90580 Series