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4.5.2 External wait function
When an extremely slow device, I/O, or asynchronous system is connected, any number of wait states can be in-
serted in a bus cycle by sampling the external wait pin (WAIT) to synchronize with the external device.
The external WAIT signal does not affect the access times of the internal ROM, internal RAM, and on-chip periph-
eral I/O areas. Input of the external WAIT signal can be done asynchronously to CLKOUT and is sampled at the fal-
ling edge of the clock in the T2 and TW states of a bus cycle. If the setup/hold time of the WAIT input are not satis-
fied, the wait state may or may not be inserted in the next state.
4.5.3 Relations between programmable wait and external wait
A wait cycle is inserted as a result of an OR operation between the wait cycle specified by the set value of pro-
grammable wait and the wait cycle controlled by the WAIT pin. In other words, the number of wait cycles is deter-
mined by the programmable wait value or the length of evaluation at the WAIT input pin.
Programmable wait
Wait by WAIT pin
For example, if the number of programmable wait and the timing of the WAIT pin input signal is as illustrated be-
low, three wait states will be inserted in the bus cycle.
Wait by WAIT pin
Programmable wait
Wait control
{: valid sampling timing
Remark
88
CHAPTER 4
BUS CONTROL FUNCTION
Figure 4-1. Example of Inserting Wait States
T1
T2
CLKOUT
WAIT pin
Wait control
TW
TW
TW
T3
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