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(7) Timer/counter
A two-channel 16-bit timer/event counter and a four-channel 8-bit timer/event counter are both on chip, which
enables measurement of pulse intervals and frequency as well as programmable pulse output.
The two-channel 8-bit timer/event counter can be connected via a cascade connection to enable use as a 16-bit
timer.
(8) Watch timer
This timer counts the reference time period (0.5 seconds) for counting the clock (the 32.768-kHz subsystem
clock or the 16.777-MHz main system clock). At the same time, the watch timer can be used as an interval timer
for the main system clock.
(9) Watchdog timer
A watchdog timer has been included to detect runaway programs, system abnormalities, etc.
It can also be used as an interval timer.
When used as a watchdog timer, it generates a nonmaskable interrupt request (INTWDT) after an overflow
occurs. When used as an interval timer, it generates a maskable interrupt request (INTWDTM) after an overflow
occurs.
(10) Serial interface (SIO)
The V850/SA1 includes two kinds of serial interfaces: an asynchronous serial interface (UART) and a clock-
synchronized serial interface (CSI). These plus the I
channels is switchable between the UART and CSI and another is switchable between CSI and I
remaining two channels are fixed (one as UART and one as CSI).
For UART, data is transferred via the TXDn and RXDn pins.
For CSI, data is transferred via the SOn, SIn, and SCKn pins.
2
For I
C, data is transferred via the SDA and SCL pins.
For UART only, there is a two-channel dedicated baud rate generator on chip.
(11) A/D converter
This high-speed, high-resolution 10-bit A/D converter includes 12 analog input pins. Conversion uses the
successive conversion method.
(12) DMA controller
A three-channel DMA controller is on chip. This controller transfers data between the on-chip RAM and on-cihip
peripheral I/O devices in response to interrupt requests sent by on-chip peripheral I/O.
(13) RTP
The RTP is a real-time output function that transfers previously set 8-bit data to an output latch when an
external trigger signal occurs or when there is a coincidence signal in a timer compare register. It can also be
used for 4-bit × 2 ch.
CHAPTER 1
INTRODUCTION
2
C bus interface comprise four channels. One of these
2
C, while the
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