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Figure 10-26. Example of Master to Slave Communication
(when 9-clock Wait Is Selected for Both Master and Slave) (2/3)
Processing by master device
IIC0
ACKD
STD
L
SPD
L
WTIM
H
ACKE
H
H
MSTS
STT
L
L
SPT
WREL
L
INTIIC0
TRC
Transmit
H
Transfer lines
8
9
SCL
D0
SDA
Processing by slave device
IIC0
ACKD
STD
L
SPD
L
WTIM
H
H
ACKE
MSTS
L
STT
L
SPT
L
WREL
INTIIC0
TRC
L
Receive
Note To cancel slave wait, write "FFH" to IIC0 or set WREL.
CHAPTER 10 SERIAL INTERFACE FUNCTION
(b) Data
IIC0 ← data
1
2
3
4
5
D7
D6
D5
D4
D3
IIC0 ← FFH Note
Note
6
7
8
9
D2
D1
D0
IIC0 ← data
1
2
3
D7
D6
D5
IIC0 ← FFH Note
Note
275
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