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4.3.2 Bus width.....................................................................................................................................
4.4
Memory Block Function.......................................................................................................................
4.5
Wait Function........................................................................................................................................
4.5.1 Programmable wait function ........................................................................................................
4.5.2 External wait function ..................................................................................................................
4.5.3 Relations between programmable wait and external wait ...........................................................
4.6
Idle State Insertion Function ...............................................................................................................
4.7
Bus Hold Function................................................................................................................................
4.7.1 Outline of function .......................................................................................................................
4.7.2 Bus hold procedure .....................................................................................................................
4.7.3 Operation in power save mode ...................................................................................................
4.8
Bus Timing............................................................................................................................................
4.9
Bus Priority ...........................................................................................................................................
4.10 Memory Boundary Operation Condition ............................................................................................
4.10.1 Program space ..........................................................................................................................
4.10.2 Data space ................................................................................................................................
CHAPTER 5 INTERRUPT/EXCEPTION PROCESSING FUNCTION................................................. 101
5.1
Features ................................................................................................................................................ 101
5.2
Non-Maskable Interrupt ....................................................................................................................... 104
5.2.1 Accepting operation..................................................................................................................... 105
5.2.2 Restore........................................................................................................................................ 107
5.2.3 NP flag......................................................................................................................................... 108
5.2.4 Noise elimination circuit of NMI pin ............................................................................................. 108
5.2.5 Edge detection function of NMI pin ............................................................................................. 109
5.3
Maskable Interrupts.............................................................................................................................. 110
5.3.1 Operation..................................................................................................................................... 110
5.3.2 Restore........................................................................................................................................ 112
5.3.3 Priorities of maskable interrupts .................................................................................................. 113
5.3.4 Interrupt control register (xxICn).................................................................................................. 117
5.3.5 In-service priority register (ISPR) ................................................................................................ 119
5.3.6 Maskable interrupt status flag ..................................................................................................... 119
5.3.7 Watchdog timer mode register (WDTM)...................................................................................... 120
5.3.8 Noise elimination ......................................................................................................................... 120
5.3.9 Edge detection function............................................................................................................... 121
5.4
Software Exception .............................................................................................................................. 122
5.4.1 Operation..................................................................................................................................... 122
5.4.2 Restore........................................................................................................................................ 123
5.4.3 EP flag......................................................................................................................................... 124
5.5
Exception Trap ..................................................................................................................................... 124
5.5.1 Illegal op code definition.............................................................................................................. 124
5.5.2 Operation..................................................................................................................................... 124
5.5.3 Restore........................................................................................................................................ 125
5.6
Priority Control ..................................................................................................................................... 127
5.6.1 Priorities of interrupts and exceptions ......................................................................................... 127
5.6.2 Multiple interrupt processing ....................................................................................................... 127
5.7
Interrupt Latency Time......................................................................................................................... 130
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