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(1) 8-bit counter 2-5 (TM2-TM5)
TMn is an 8-bit read-only register that counts the count pulses.
The counter is incremented synchronous to the rising edge of the count clock. When the count is read out during
operation, the count clock input temporarily stops and the count is read at that time. In the following cases, the
count becomes 00H.
(1) RESET is input.
(2) TCEn is cleared.
(3) TMn and CRn0 match in the clear and start mode.
Caution The cascade connection time becomes 00H even when TCEn in the lowest-order timer is
cleared.
(2) 8-bit compare register 2-5 (CR20-CR50)
The value set in CRn0 is always compared to the count in the 8-bit counter n (TMn). If the two values match, an
interrupt request (INTTMn) is generated (except in the PWM mode).
The value of CRn0 can be set in the range of 00H to FFH, and can be written during counting.
Caution If data is set in a cascade connection, always set after stopping the timer.
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CHAPTER 7
TIMER/COUNTER FUNCTION
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