Configuration - NEC V850/SA1 mPD703015 Preliminary User's Manual

13.2 Configuration

RTO consists of the following hardware.
Item
Register
Control register
(1) Real-time output buffer registers (RTBL, RTBH)
RTBL and RTBH are 4-bit registers that hold output data in advance.
These registers are mapped to independent addresses in the special function register (SFR) area as shown in
Figure 13-2.
If an operation mode of 4 bits × 2 channels is specified, data can be independently set to RTBL and RTBH. The
data of both the registers can be read all at once by specifying the address of either of the registers.
If an operation mode of 8 bits × 1 channel is specified, 8-bit data can be set to both RTBL and RTBH by writing
the data to either of the registers. The data of both the registers can be read all at once by specifying the
address of either of the registers.
Figure 13-2 shows the configuration of RTBL and RTBH, and Table 13-2 shows the operation to be performed
when RTBL and RTBH are manipulated.
Figure 13-2. Configuration of Real-Time Output Buffer Registers
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CHAPTER 13 REAL-TIME OUTPUT FUNCTION (RTO)
Table 13-1. Configuration of RTO
Real-time output buffer register (RTBL, RTBH)
Real-time output port mode register (RTPM)
Real-time output port control register (RTPC)
High-order 4 bits
RTBH
Configuration
Low-order 4 bits
RTBL