NEC V850/SA1 mPD703015 Preliminary User's Manual page 103

CHAPTER 5
Classifi- Default
Type
cation Priority
Maskable Interrupt 23
24
25
26
27
28
29
Notes 1. n: value of 0 to FH
2. Valid only for the µ PD703015Y and 70F3017Y
Remarks 1. Default Priority :
Restored PC
2. The execution address of the illegal instruction when an illegal op code exception occurs is calcu-
lated with (Restored PC − 4).
3. Restored PC of the interrupt/exception other than RESET is the value of the PC (when an event oc-
cured) +1.
4. Non-maskable interrupt (INTWDT) and maskable interrupt (INTWDTM) are set by the WDTM4 bit of
the watchdog timer mode register (WDTM).
INTERRUPT/EXCEPTION PROCESSING FUNCTION
Table 5-1. Interrupt Source List (2/2)
Name Trigger
INTSR1 UART1 receiving end
INTST1 UART1 transmit end
INTAD A/D conversion end
INTDMA0 DMA0 transfer end
INTDMA1 DMA1 transfer end
INTDMA2 DMA2 transfer end
INTWT Watch timer OVF
Priority that takes precedence when two or more maskable interrupt requests
occur at the same time. The highest priority is 0.
: The value of the PC saved to EIPC or FEPC when interrupt/exception process-
ing is started. However, the value of the PC saved when an interrupt is granted
during the DIVH (division) instruction execution is the value of the PC of the cur-
rent instruction (DIVH).
Genera- Exception Handler
ting Unit Code Address
UART 01F0H 000001F0H
UART 0200H 00000200H
A/D 0210H 00000210H
DMA0 0220H 00000220H
DMA1 0230H 00000230H
DMA2 0240H 00000240H
WT 0250H 00000250H
Interrupt
Restored
Control
PC
Register
nextPC SRIC1
nextPC STIC1
nextPC ADIC
nextPC DMAIC
0
nextPC DMAIC
1
nextPC DMAIC
2
nextPC WTIC
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