NEC V850/SA1 mPD703015 Preliminary User's Manual page 330

32-/16-bit single-chip microcontrollers
Table of Contents

Advertisement

(1) Function of P0 pins
Port 0 is an 8-bit I/O port for which I/O settings can be controlled bitwise. I/O settings are controlled via the port 0
mode register (PM0).
During output mode, the values set to each bit are output to the port register (P0). When using this port in output
mode, either the valid edge of each interrupt request should be made invalid or each interrupt request should be
masked (except for NMI requests).
When using this port in input mode, the pin statuses can be read by reading the P0 register. Also, the P0
register (output latch) values can be read by reading the P0 register while in output mode.
The valid edge of NMI and INTP0 to INTP6 are specified via the external interrupt rising edge enable register
(EGP0) and the external interrupt falling edge enable register (EGN0).
A pull-up resistance can be connected bitwise when specified via the pull-up resistance option register (PU0).
When a reset is input, the settings are initialized to input mode. Also, the valid edge of each interrupt request
becomes invalid (after a reset, NMI, and INTP0 to INTP6 do not function).
(2) Noise elimination
(a) Elimination of noise from NMI and INTP0 to INTP3 pins
An on-chip noise elimination circuit uses analog delay to eliminate noise. Consequently, if a signal having a
constant level is input for longer than a specified time to these pins, it is detected as a valid edge. Such
edge detection occurs after the specified amount of time.
(b) Elimination of noise from INTP4 to INTP6, ADTRG, and RTPTRG pins
A digital noise elimination circuit is provided on chip.
This circuit uses digital sampling for noise elimination. A pin's input level is detected using a sampling clock
(f
) and noise elimination is performed if the same level is not detected three times consecutively.
xx
Cautions 1. If the input pulse width is 2 or 3 clocks, whether it will be detected as a valid edge or
eliminated as noise is undefined.
2. To ensure the detection pulses, constant-level input exceeding 3 clocks is required.
3. If noise is occurring in synchronization with the sampling clock, it may not be
recognized as noise. In such cases, attach a filter to the input pins to eliminate the
noise.
4. Noise elimination is not performed when these pins are used as an ordinary input
port.
330
CHAPTER 14
PORT FUNCTION

Advertisement

Table of Contents
loading

Table of Contents