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(6) Memory write (1 wait)
CLKOUT (input)
A16 to A21 (output)
A1 to A15 (output)
AD0 to AD15
(input/output)
ASTB (output)
R/W (output)
RD (output)
DSTB (output)
WRH, WRL (output)
UBEN, LBEN (output)
WAIT (input)
Note AD0 to AD7 output invalid data when odd address byte data is accessed.
AD8 to AD15 output invalid data when even address byte data is accessed.
Remarks 1. { indicates the sampling timing when the number of programmable waits is set to 0.
2. The broken line indicates the high-impedance state.
CHAPTER 4 BUS CONTROL FUNCTION
T1
T2
Address
Address
Address
H
TW
T3
Note
Data
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