Format Of 8-Bit Timer Mode Control Register 2-5 (Tmc2-Tmc5) - NEC V850/SA1 mPD703015 Preliminary User's Manual

CHAPTER 7
Figure 7-37. Format of 8-Bit Timer Mode Control Register 2-5 (TMC2-TMC5) (1/2)
After reset: 04H R/W
7 6
TMCn TCEn TMCn6
(n = 2-5)
TCEn
0 Counting is disabled after the counter is cleared to 0 (prescaler disabled).
1 Start counting
TMCn6
0 Clear and start mode when TMn and CRn0 match
1 PWM (free running) mode
TMCn4
0 Individual mode (used by the lowest-order timer) (fixed to 0 when n = 2, 4)
1 Cascade connection mode (connection with low-order timer)
LVSn LVRn
0 0
0 1
1 0
1 1
TMCn1 Not PWM Mode (TMCn6 = 0)
0 Disable inversion operation
1 Enable inversion operation
TIMER/COUNTER FUNCTION
Address: TMC2 FFFFF246H
TMC3 FFFFF256H
TMC4 FFFFF266H
TMC5 FFFFF276H
5 4
0 TMCn4 LVSn
TMn Count Control
TMn Operating Mode Selection
Individual Mode or Cascade Connection Mode Selection
Setting the State of the Timer Output Flip-Flop
No change
Reset the timer output flip-flop (to 0).
Set the timer output flip-flop (to 1).
Setting prohibited
Timer flip-flop control
3 2 1
LVRn TMCn1
PWM Mode (TMCn6 = 1)
Active level selection
Active high
Active low
0
TOEn
183