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Figure 10-27. Example of Slave to Master Communication
(when 9-clock Wait Is Selected for Both Master and Slave) (3/3)
Processing by master device
IIC0
IIC0← FFH Note
ACKD
STD
SPD
WTIM
H
ACKE
H
MSTS
STT
SPT
Note
WREL
INTIIC0
TRC
Transfer lines
1
SCL
D7
SDA
Processing by slave device
IIC0 ← data
IIC0
ACKD
STD
SPD
WTIM
H
ACKE
H
MSTS
L
STT
L
SPT
L
WREL
INTIIC0
TRC
Note
To cancel slave wait, write "FFH" to IIC0 or set WREL.
CHAPTER 10 SERIAL INTERFACE FUNCTION
(c) Stop condition
2
3
4
5
6
7
D6
D5
D4
D3
D2
D1
(When SPIE = 1)
8
9
D0
N−ACK
Stop
condition
(When SPIE = 1)
IIC0 ← address
1
2
A6
A5
Start
condition
279
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