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(9) P90 to P96 (Port 9) ··· 3-state I/O
Port 9 is a 7-bit I/O port in which input and output pins can be specified bitwise.
P90 to P96 can function as I/O port pins and can also operate as control signal output pins and bus hold control
signal output pins when using external memory expansion.
During 8-bit access of port 9, the highest-order bit is ignored during a write operation and is read as a "0" during
a read operation. Port mode or a control mode can be specified bitwise.
The I/O signal level uses the bus interface power supply pins BV
(a) Port mode
P90 to P96 can be set bitwise as input or output pins according to the contents of port 9 mode register
(PM9).
(b) Control modes (external expansion mode)
P90 to P96 can be set to operate as control signal outputs for external memory expansion according to the
contents of the memory expansion register (MM).
(i)
LBEN (Lower Byte Enable) ··· output
This is a lower byte enable (LBEN) signal output pin for an external 16-bit data bus. The output
changes in synchronization with the rising edge of the clock in the T1 state of the bus cycle. When the
timing sets the bus cycle as inactive, the previous bus cycle's address is retained.
(ii) UBEN (Upper Byte Enable) ··· output
This is an upper byte enable (UBEN) signal output pin for an external 16-bit data bus. During byte
access of even-numbered addresses, these pins are set as inactive (high level). The output changes in
synchronization with the rising edge of the clock in the T1 state of the bus cycle. When the timing sets
the bus cycle as inactive, the previous bus cycle's address is retained.
Word access
Half word access
Byte access
44
CHAPTER 2
PIN FUNCTIONS
Access
Even-numbered address
Odd-numbered address
and BV
as a reference.
DD
SS
UBEN
LBEN
0
0
0
0
1
0
0
1
A0
0
0
0
1
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