Table of Contents
Advertisement
RXD0, RXD1
TXD0, TXD1
Baud rate generator
ASCK0, ASCK1
(1) Transmit shift register 0, 1 (TXS0, TXS1)
This is the register for setting transmit data. Data written to TXSn is transmitted as serial data.
When the data length is set as 7 bits, bit 0 to bit 6 of the data written to TXSn is transmitted as serial data.
Writing data to TXSn starts the transmit operation.
TXSn can be written to by an 8-bit memory manipulation instruction. It cannot be read from.
RESET input sets these registers to FFH.
Caution
Do not write to TXSn during a transmit operation.
(2) Receive shift register 0, 1 (RX0, RX1)
This register converts serial data input via the RXD0, RXD1 pin to parallel data. When one byte of data is
received at this register, the receive data is transferred to the receive buffer register (RXB0, RXB1).
RX0, RX1 cannot be manipulated directly by a program.
CHAPTER 10
SERIAL INTERFACE FUNCTION
Figure 10-28. Block Diagram of UARTn
Internal Bus
8
Receive buffer register
0, 1 (RXB0, RXB1)
8
Receive shift register
0, 1 (RX0, RX1)
Receive control
INTSR0,
parity check
INTSR1
8
Transmit shift register
0, 1 (TXS0, TXS1)
INTST0,
Transmit control
parity addition
INTST1
Selector
5
fxx-fxx/2
281
Advertisement
Table of Contents
