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Figure 10-11. Format of IIC Clock Select Register (IICCL0) (2/2)
Note
DFC
SMC
×
1
×
1
×
1
×
1
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
Note The digital filter (DFC) can be used when in high-speed mode. Response time is slower when the
digital filter is used.
Remark × : don't care
(4) IIC shift register (IIC0)
This register is used for serial transmission/reception (shift operations) that are synchronized with the serial
clock. It can be read from or written to in 8-bit units, but data should not be written to IIC0 during a data
transfer.
After reset : 00H
R/W
7
6
IIC0
(5) Slave address register (SVA0)
This register holds the I
It can be read from or written to in 8-bit units, but bit 0 should be fixed as "0".
After reset : 00H
R/W
7
6
SVA0
CHAPTER 10 SERIAL INTERFACE FUNCTION
CL1
CL0
0
0
fxx/24
0
1
fxx/24
1
0
fxx/48
1
1
TM2 output/18
0
0
fxx/44
0
1
fxx/86
1
0
fxx/172
1
1
TM2 output/66
0
0
fxx/46
0
1
fxx/88
1
0
fxx/176
1
1
TM2 output/68
Address: FFFFF348H
5
4
2
C bus's slave addresses.
Address: FFFFF346H
5
4
Operation Mode Switching
3
2
1
3
2
1
0
0
0
231
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