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(2) Power saving control register (PSC)
This is a specific register. It can be written to only when a specified combination of sequences is used.
For details, see 3.4.9 Specific registers.
This register can be read/written in 8- or 1-bit units.
After reset:
C0H
7
PSC
DCLK1
DCLK1
0
0
1
1
CESEL
0
1
IDLE
0
1
STP
0
1
Notes 1.
When CESEL = 1, the oscillation stabilization time is cut.
2.
When IDLE mode is canceled, this bit is automatically reset (to "0").
3.
When STOP mode is canceled, this bit is automatically reset (to "0").
Caution The bits in DCLK0 and DCLK1 should be manipulated in 8-bit units.
134
CHAPTER 6
CLOCK GENERATION FUNCTION
Figure 6-2. Format of Power Saving Control Register (PSC)
R/W
Address : FFFFF070H
6
5
DCLK0
0
DCLK0
0
Output enabled
1
Setting prohibited
0
Setting prohibited
1
Output disabled (when reset)
Selection of Resonator and External Clock
Connect resonator to X1 and X2
Connect external clock to X1
Normal mode
Note 2
IDLE mode
Normal mode
Note 3
STOP mode
4
3
CESEL
0
Specification of CLKOUT Pin's Operation
Note 1
IDLE Mode Setting
STOP Mode Setting
2
1
IDLE
STP
0
0
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