Appendix Blist Of Instrution Set - NEC V850/SA1 mPD703015 Preliminary User's Manual

Legend
(1) used for operand description
Symbol
reg1
reg2
Imm×
disp×
regID
bit#3
ep
cccc
vector
(2) Symbol used for op code
Symbol
R
r
d
i
cccc
bbb
(3) Symbol used for operation description (1/2)
Symbol
←
GR[ ]
SR[ ]
zero-extend (n)
sign-extend (n)
load-memory (a,b)
store-memory (a,b,c)
load-memory-bit (a,b)
store-memory-bit (a,b,c)
saturated (n)
APPENDIX B LIST OF INSTRUTION SET
General register (r0 to r31) : Used as source register
General register (r0 to r31) : Mainly used as destination register
×-bit immediate
×-bit displacement
System register number
3-bit data for bit number specification
Element pointer (r30)
4-bit data for condition code
5-bit data for trap vector number (00H to 1FH)
1-bit data of code that specifies reg1 or regID
1-bit data of code specifies reg2
1-bit data of displacement
1-bit data of immediate
4-bit data that indicates condition code
3-bit data specified by bit number
Assignment
General register
System register
Zero-extends n to word length.
Sign-extends n to word length.
Reads data of size b from address a.
Writes data b of size c to address a.
Reads bit b from address a.
Writes c to bit b of address a
Performs saturated processing of n. (n is 2's complements).
Result of calculation of n:
If n is n ≥ 7FFFFFFFH as result of calculation, 7FFFFFFFH.
If n is n ≤ 80000000H as result of calculation, 80000000H.
Description
Description
Description
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