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4.2.2 Control register
(1) System control register (SYC)
This register switches control signals for bus interface.
The system control register can be read/written in 8- or 1-bit units.
After reset: 00H
R/W
Symbol
7
6
SYC
0
0
BIC
0
DSTB, R/W, UBEN, LBEN signal outputs
1
RD, WRL, WRH, UBEN signal outputs
4.3 Bus Access
4.3.1 Number of access clocks
The number of basic clocks necessary for accessing each resource is as follows:
Bus Cycle Type
Instruction fetch
Operand data access
Remarks 1. Unit : Clock/access
2. n
: Number of wait insertions
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CHAPTER 4
BUS CONTROL FUNCTION
Address: FFFFF064H
5
4
0
0
Bus Interface Control
Internal ROM
Internal RAM
(32 bits)
(32 bits)
1
3
3
2
1
0
0
0
Peripheral I/O (bus width)
Peripheral I/O
(16 bits)
3
Disabled
1
3
0
BIC
External Memory
(16 bits)
3 + n
3 + n
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