Table of Contents
Advertisement
(i)
A1 to A4 (Address 1 to 4) ···output
These are address bus that is used for external access. These pins operate as the low-order 4-bit
address output pins within a 22-bit address. The output changes in synchronization with the rising
edge of the clock in the T1 state of the bus cycle. When the timing sets the bus cycle as inactive, the
previous bus cycle's address is retained.
(ii) XT1 (Crystal for Sub-Clock) ··· input
This is the sub-clock input pin.
(12) P120 (Port 12) ··· 3-state I/O
Port 12 is an I/O port in which the input or output pin can be specified bitwise. P120 can function as an I/O port
and can also operate as a control signal (WAIT) pin when a wait is inserted in the bus cycle. This pin can be set
to port mode or control mode.
The I/O signal level uses the bus interface power supply pins BV
(a) Port mode
P120 can be set as an input or output pin according to the contents of port 12 mode register (PM12).
(b) Control mode
P120 can operate as the WAIT pin according to the contents of port 12 mode control register (PMC12).
(i)
WAIT (Wait) ··· input
This is the input pin for the control signal used to insert waits into the bus cycle. This pin is sampled at
the falling edge of the clock during the T2 or TW state of the bus cycle.
(13) RESET (Reset) ··· input
RESET input is asynchronous input for a signal that has a constant low level width regardless of the operating
clock's status. When this signal is input, a system reset is executed as the first priority ahead of all other
operations.
In addition to being used for ordinary initialization/start operations, this pin can also be used to cancel a standby
mode (HALT, IDLE, or STOP mode).
(14) X1, X2 (Crystal) ... input
These pins are used to connect the resonator that generates the system clock.
These pins can also be used to input an external clock. When inputting an external clock, connect the X1 pin
and leave the X2 pin unconnected.
(15) XT2 (Crystal for Sub-Clock) ··· input
This pin is used to connect the resonator that generates the sub clock (subsystem clock).
CHAPTER 2
PIN FUNCTIONS
DD
and BV
as a reference.
SS
47
Advertisement
Table of Contents
