CHAPTER 4 BUS CONTROL FUNCTION
(2) Memory read (1 wait)
T1
T2
TW
T3
CLKOUT (input)
Address
A16 to A21 (output)
A1 to A15 (output)
Address
AD0 to AD15
Address
Data
(input/output)
ASTB (output)
R/W (output)
H
WRH, WRL (output)
DSTB, RD (output)
UBEN, LBEN (output)
WAIT (input)
Remarks 1. { indicates the sampling timing when the number of programmable waits is set to 0.
2. The broken line indicates the high-impedance state.
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