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(3) Receive buffer register 0, 1 (RXB0, RXB1)
This register is used to hold receive data. When one byte of data is received, one byte of new receive data is
transferred.
When the data length is set as 7 bits, receive data is sent to bit 0 to bit 6 of RXBn. In RXBn, the MSB must be
set to "0".
RXBn can be read by an 8-bit memory manipulation instruction. It cannot be written to.
RESET input sets RXBn to FFH.
(4) Transmission control circuit
The transmission control circuit controls transmit operations, such as adding a start bit, parity bit, and stop bit to
data that is written to the transmit shift register (TXSn), based on the values set to the asynchronous serial
interface mode register (ASIMn).
(5) Reception control circuit
The reception control circuit controls receive operations based on the values set to the asynchronous serial
interface mode register (ASIMn). During a receive operation, it performs error checking, such as for parity errors,
and sets various values to the asynchronous serial interface status register (ASISn) according to the type of error
that is detected.
10.4.2 UARTn control registers
The UARTn uses the following four types of registers for control functions.
•
Asynchronous serial interface mode register (ASIMn)
•
Asynchronous serial interface status register (ASISn)
•
Baud rate generator control register (BRGCn)
•
Baud rate generator mode control register (BRGMCn)
(1) Asynchronous serial interface mode register 0, 1 (ASIM0, ASIM1)
This is an 8-bit register that controls UARTn's serial transfer operations.
ASIMn can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets these registers to 00H.
Figure 10-29 shows the format of ASIMn.
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CHAPTER 10
SERIAL INTERFACE FUNCTION
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