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Figure 10-5. Format of Serial Operation Mode Registers 0-2 (CSIM0-CSIM2) (2/2)
SCLn2
SCLn1
0
0
0
0
1
1
Others
Remarks 1. Parenthesized values apply when fxx = 17 MHz.
2. Refer to Figure 10-3 for the SCLn2 bit.
(ii) Communication Operations
In 3-wire serial I/O mode, data is transmitted and received in 8-bit units. Each bit of data is sent or received
in synchronized with the serial clock.
The serial I/O shift register n (SIOn) is shifted in synchronized with the falling edge of the serial clock.
Transmission data is held in the SOn latch and is output from the SOn pin. Data that is received via the SIn
pin in synchronized with the rising edge of the serial clock is latched to SIOn.
Completion of an 8-bit transfer automatically stops operation of SIOn and sets the interrupt request flag
(INTCSIn).
Serial clock
SI0
SO0
INTCSIn
CHAPTER 10
SERIAL INTERFACE FUNCTION
SCLn0
0
0
External clock input (SCKn)
0
1
when n = 0 : TO2
when n = 1, 2 : TO3
1
0
fxx/8 (2.125 MHz)
1
1
fxx/16 (1.0626 MHz)
1
0
fxx/32 (531.3 kHz)
1
1
fxx/64 (265.6 kHz)
Setting prohibited
Figure 10-6. Timing of 3-wire Serial I/O Mode
1
2
3
4
DI7
DI6
DI5
DI4
DO7 DO6 DO5 DO4 DO3 DO2 DO1
Transfer starts in synchronized with the serial clock's falling edge
Clock Selection
5
6
7
8
DI3
DI2
DI1
DI0
DO0
Transfer completion
215
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