Operation As External Event Counter - NEC V850/SA1 mPD703015 Preliminary User's Manual

7.2.4 Operation as external event counter

Timer 0 can be used as an external event counter which counts the number of clock pulses input to the TIn0 pin
from an external source by using the 16-bit timer register n (TMn).
Each time the valid edge specified by the prescaler mode register n (PRMn) has been input, TMn is incremented.
When the count value of TMn coincides with the value of the 16-bit capture/compare register n0 (CRn0), TMn is
cleared to 0, and an interrupt request signal (INTTMn0) is generated.
The edge is specified by bits 4 and 5 (ESn00 and ESn01) of the prescaler mode register n (PRMn). The rising,
falling, or both the rising and falling edges can be specified.
The valid edge is detected through sampling at a count clock cycle of f
performed until the valid level is detected two times. Therefore, noise with a short pulse width can be rejected.
Figure 7-21. Control Register Settings in External Event Counter Mode
TMCn 0 0
CRCn 0 0
Remark 0/1: When these bits are reset to 0 or set to 1, the other functions can be used along with the external
event counter function. For details, refer to Figures 7-2 and 7-3.
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CHAPTER 7 TIMER/COUNTER FUNCTION
(a) 16-bit timer mode control register 0, 1 (TMC0, TMC1)
TMCn3
0 0
(b) Capture/compare control register 0, 1 (CRC0, CRC1)
0 0
, and the capture operation is not
xx
TMCn2 TMCn1
1 1 0/1
CRCn2 CRCn1
0 0/1 0/1
OVFn
0
Clears and starts on
coincidence between
TMn and CRn0.
CRCn0
0
CRn0 as compare
register