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SPT
Stop condition is not generated.
0
1
Stop condition is generated (termination of master device's transfer).
After the SDA line goes to low level, either set the SCL line to high level or wait until it goes to high level.
Next, after the rated amount of time has elapsed, the SDA line is changed from low level to high level and
a stop condition is generated.
Cautions concerning set timing
• For master reception
• For master transmission : Note that a stop condition cannot be generated normally during the ACK period.
• Cannot be set at the same time as STT.
• SPT can be set only when in master mode.
• When WTIM has been set to 0, if SPT is set during the wait period that follows output of eight clocks, note that a stop
condition will be generated during the high level period of the ninth clock.
When a ninth clock must be output, WTIM should be changed from 0 to 1 during the wait period following output of
eight clocks, and SPT should be set during the wait period that follows output of the ninth clock.
Condition for clearing (SPT = 0)
• Cleared by instruction
• Cleared by loss in arbitration
• Automatically cleared after stop condition is detected
• When LREL = 1.
• Cleared when RESET is input
Notes 1. Set SPT only during master mode. However, you must set SPT and generate a stop condition
before the first stop condition is detected following the switch to operation enable status. For
details, see "10.3.13 Other cautions".
2. This flag's signal is invalid when IICE = 0.
Caution
When bit 3 (TRC) of the IIC status register (IICS0) is set to "1", WREL is set during the ninth
clock and wait is canceled, after which TRC is cleared and the SDA line is set for high
impedance.
Remark
Bit 0 (SPT) is 0 when it is read after data setting.
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CHAPTER 10 SERIAL INTERFACE FUNCTION
Figure 10-9. Format of IIC Control Register (IICC0) (4/4)
: Cannot be set during transfer.
Can be set only when ACKE has been set to 0 and slave has been notified of final
reception.
Note 1
Note 2
Stop Condition Trigger
Condition for setting (SPT = 1)
• Set by instruction
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