L_Dflipflop_1 - Lenze 8400 StateLine C Reference Manual

L-force drives; e84avsc series;
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16.1.14

L_DFlipFlop_1

The FB saves binary signals (DFlipFlop) in a clock-controlled way.
Inputs
Identifier
bD
bClk
bClr
Outputs
Identifier
bOut
bNegOut
Function
If the bClr input = FALSE, a signal edge at the bClk input switches the static input signal bD
to the bOut output, where it is retained:
Firmware ≤ 11.00 - DMS 8.0 EN - 10/2011
Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com
Information/possible settings
Data type
Data input
BOOL
Clock input
• Only FALSE/TRUE edges are evaluated
BOOL
Reset input
BOOL
TRUE • The bOut output is set to FALSE.
• The bNegOut output is set to TRUE.
Value/meaning
Data type
Output signal
BOOL
Output signal, inverted
BOOL
bD
TRUE
FALSE
bClk
TRUE
FALSE
bOut
TRUE
FALSE
L
8400 StateLine C | Reference manual
Function blocks | L_DFlipFlop_1
Function library
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t
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793

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