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7.4.1
Automatic SCI Bit Rate Adjustment
Start
bit
When the boot program is initiated, the boot program measures the low period of the
asynchronous SCI communication data (H'00) transmitted continuously from the host. After the
reset ends, it takes approximately 100 states before the chip is ready to measure the low-level
period. The boot program adjusts the bit rate of the SCI3 to the bit rate of the transmission from
the host and transmits one H'00 byte to the host to indicate the end of bit rate adjustment. The host
should confirm that this adjustment end indication (H'00) has been received normally, and
transmit one H'55 byte to the LSI. If reception cannot be performed normally, initiate boot mode
again (reset), and repeat the above operations. Depending on the host's transmission bit rate and
the LSI's system clock frequency, there will be a discrepancy between the bit rates of the host and
the LSI. Set the host transfer bit rate and the system clock frequencies within the range shown in
Table 7.4.
Table 7.4 shows host transfer bit rates and system clock frequencies for which automatic
adjustment of the LSI bit rate is possible.
Table 7.4
System Clock Frequencies for which Automatic Adjustment of LSI Bit Rate is
Possible
Host Bit Rate
19200 bps
9600 bps
4800 bps
2400 bps
7.4.2
Programming Control Program Area
In boot mode, a part of the RAM area is used by the boot program. An area to which the
programming control program is transferred is shown in figure 7.7. The boot program area cannot
be used until the execution state in boot mode switches to the programming control program
transferred from the host.
D0
D1
D2
Low period (9 bits) measured (H'00 data)
System Clock Frequency for Which Automatic Adjustment
of LSI Bit Rate is Possible
16 MHz
8 to 16 MHz
4 to 16 MHz
2 to 16 MHz
D3
D4
D5
Stop
D6
D7
bit
High period
(1 or more bits)
111
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