Figures 4.2 to 4.4 show the operation examples of the address break interrupt setting.
When the address break is specified in instruction execution cycle
Register setting
• ABRKCR = H'80
• BAR = H'025A
φ
Address
bus
Interrupt
request
Figure 4.2 Address Break Interrupt Operation Example (1)
When the address break is specified in the data read cycle
Register setting
• ABRKCR = H'A0
• BAR = H'025A
instruc-
prefetch
φ
Address
bus
Interrupt
request
Figure 4.3 Address Break Interrupt Operation Example (2)
Program
0258
NOP
025A
NOP
*
025C
MOV.W @H'025A,R0
0260
NOP
0262
NOP
:
NOP
NOP
MOV
instruc-
instruc-
instruc-
tion
tion
tion 1
prefetch
prefetch
prefetch
0258
025A
Interrupt acceptance
Program
0258
NOP
025A
NOP
*
025C
MOV.W @H'025A,R0
0260
NOP
0262
NOP
:
MOV
MOV
NOP
instruc-
instruc-
tion 1
tion 2
tion
prefetch
prefetch
025C
025E
0260
:
MOV
instruc-
tion 2
Internal
prefetch
processing
025C
025E
Underline indicates the address
to be stacked.
:
MOV
NOP
instruc-
instruc-
tion
tion
execution
prefetch
025A
0262
Interrupt acceptance
Underline indicates the address
to be stacked.
Stack save
SP-2
SP-4
Next
instru-
ction
Internal
prefetch
processing
0264
Stack
save
SP-2
73