Table of Contents
Advertisement
2
When, with the I
C bus format selected, IRIC is set to 1 and an interrupt is generated, other flags
must be checked in order to identify the source that set IRIC to 1. Although each source has a
corresponding flag, caution is needed at the end of a transfer.
When the TDRE or RDRF internal flag is set, the readable IRTR flag may or may not be set.
Even when the IRIC flag and IRTR flag are set, the TDRE or RDRF internal flag may not be set.
Table 15.3 shows the relationship between the flags and the transfer states.
Table 15.3 Flags and Transfer States
MST TRS BBSY ESTP STOP IRTR AASX AL
1/0
1/0
0
1
1
0
1
1
1
1
1/0
1
1
1/0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
1/0
1
0
1/0
1
0
1
1
0
1/0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1/0
1/0
0
AAS ADZ
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1/0
1
1/0
0
0
1
0
0
1
1
0
0
0
0
0
1
0
0
1
0
0
0
0
0
ACKB State
0
0
Idle state (flag
clearing required)
0
0
Start condition
issuance
0
0
Start condition
established
0
0/1
Master mode wait
0
0/1
Master mode
transmit/receive end
1/0
0
Arbitration lost
0
0
SAR match by first
frame in slave mode
1
0
General call
address match
0
0
SARX match
0
0/1
Slave mode
transmit/receive end
(except after SARX
match)
0
0
Slave mode
transmit/receive end
0
1
(after SARX match)
0
0/1
Stop condition
detected
315
Advertisement
Table of Contents
