Timer Mode Register Wd (Tmwd) - Hitachi H8/3664 Hardware Manual

13.2.3

Timer Mode Register WD (TMWD)

Bit 7
—
Initial value 1
Read/Write —
TMWD is an 8-bit read/write register that selects the input clock.
Upon reset, TMWD is initialized to H'FF.
Bits 7 to 4—Reserved Bits: Bits 7 to 4 are reserved; they are always read as 1 and cannot be
modified.
Bits 3 to 0—Clock Select 3 to 0 (CKS3 to CKS0): Bits 3 to 0 select the clock to be input to
TCWD.
Bit 3: Bit 2:
CKS3 CKS2
1 0
1
0 *
Note: * Don't care
6 5
— —
1 1
— —
Bit 1: Bit 0:
CKS1 CKS0
0 0
1
1 0
1
0 0
1
1 0
1
* *
4 3
— CKS3
1 1
— R/W
Description
Internal clock: ø/64
Internal clock: ø/128
Internal clock: ø/256
Internal clock: ø/512
Internal clock: ø/1024
Internal clock: ø/2048
Internal clock: ø/4096
Internal clock: ø/8192
Internal oscillator
2 1
CKS2 CKS1
1 1
R/W R/W
(Initial value)
0
CKS0
1
R/W
241