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1.1
Features
Table 1.1
Features
Item
CPU
Interrupts
Clock pulse
generators
Power-down
modes
Section 1 Overview
Description
H8/300H CPU (upward compatibility with H8/300 CPU at object level)
•
General-register machine
Sixteen 16-bit registers (also usable as eight 16-bit registers plus
sixteen 8-bit registers or eight 32-bit registers)
•
High-speed operation
Max. operation speed: 16 MHz
Add/subtract: 0.125 µs
Multiply/divide: 0.875 µs
•
Address space: 64 kbytes
•
Instruction features
8/16/32-bit data transfer, arithmetic, and logic instructions
Signed and unsigned multiply instructions
(8 bits × 8 bits, 16 bits × 16 bits)
Signed and unsigned divide instructions
(16 bits ÷ 8 bits, 32 bits ÷ 16 bits)
Bit accumulator function
Bit manipulation instructions with register-indirect specification of bit
positions
•
11 external interrupt sources (NMI, IRQ3 to IRQ0, WKP5 to WKP0)
•
20 internal interrupt sources
•
System clock pulse generator: 1 to 16 MHz
•
Sub-system clock pulse generator: 32.768 kHz (for watch)
Transition possible between five modes
•
Active mode
•
Sleep mode
•
Standby mode
•
Subsleep mode
•
Subactive mode
Gear function
•
Module standby function
1
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