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SP – 4
SP – 3
SP – 2
SP – 1
SP (R7)
Prior to start of interrupt
exception handling
Notation:
PC
:
Upper 8 bits of program counter (PC)
H
PC
:
Lower 8 bits of program counter (PC)
L
CCR:
Condition code register
SP:
Stack pointer
1.
PC shows the address of the first instruction to be executed upon return from the interrupt
Notes:
handling routine.
2.
Register contents must always be saved and restored by word length, starting from
an even-numbered address.
3. Ignored when returning from the interrupt handling routine.
Figure 3.2 Stack State after Completion of Interrupt Exception Handling
60
Stack area
SP (R7)
SP + 1
SP + 2
SP + 3
SP + 4
After completion of interrupt
PC and CCR
saved to stack
CCR
*3
CCR
PC
H
PC
L
exception handling
Even address
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