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Start
Read bit TDRE
1
in SSR
TDRE = 1?
Yes
Set bit MPBT
in SSR
Write transmit
data to TDR
Continue data
2
transmission?
No
Read bit TEND
in SSR
TEND = 1?
Yes
3
Break output?
Yes
Set PDR = 0,
PCR = 1
Clear bit TE to
0 in SCR3
End
Figure 14.17 Example of Multiprocessor Data Transmission Flowchart
1.
Read the serial status register (SSR)
and check that bit TDRE is set to 1,
then set bit MPBT in SSR to 0 or 1 and
write transmit data to the transmit data
register (TDR). When data is written to
No
TDR, bit TDRE is cleared to 0 automatically.
2.
When continuing data transmission, be
sure to read TDRE = 1 to confirm that a
write can be performed before writing data
to TDR. When data is written to TDR, bit
TDRE is cleared to 0 automatically.
3.
If a break is to be output when data
transmission ends, set the port PCR to 1
and clear the port PDR to 0, then clear bit
TE in SCR3 to 0.
Yes
No
No
289
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