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6.8
Active Mode
6.8.1
Transition to the Active Mode
The active mode is entered from the standby, sleep, or subsleep mode if an interrupt is requested
while the LSON bit in SYSCR2 is cleared to 0. The system directly goes to the active mode when
a SLEEP instruction is executed while the DTON bit in SYSCR2 is set to 1 and the LSON bit in
SYSCR2 is cleared to 0. The operating frequency changes to the set frequency after SLEEP
instruction execution. A transition to the active mode does not take place if the I bit of CCR is set
to 1 or the requested interrupt is disabled in the interrupt enable register. In the active mode, the
CPU and on-chip peripheral modules function at the clock frequency set by the MA2, MA1, and
MA0 bits in SYSCR2.
6.8.2
Transition from the Active Mode to Other Modes
A transition from the active mode to the standby mode takes place if the SLEEP instruction is
executed while the SSBY bit in SYSCR1 is set to 1 and the DTON bit in SYSCR1 is cleared to 0.
If the SLEEP instruction is executed while SSBY is cleared to 0 and the DTON and SMSEL bits
in SYSCR2 are cleared to 0, the sleep mode is entered. If the SLEEP instruction is executed while
SSBY is cleared to 0, the DTON bit is cleared to 0, and the SMSEL bit is set to 1, the subsleep
mode is entered. Direct transition from the active mode to the subactive mode is also possible. See
section 6.9, Direct Transition, for details.
6.8.3
Operating Frequency in the Active Mode
Operation in the active mode is clocked at the frequency designated by the MA1 and MA0 bits in
SYSCR1. The operating frequency changes to the set frequency after SLEEP instruction
execution.
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