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On-chip data bus
H
CPU
L
Figure 12.3 8-Bit Register Interface (CPU and TCRW (8 bits))
12.4
Operation
12.4.1
Overview
A summary of operations in the various modes is given below.
• Normal Operation
Timer W has a timer counter (TCNT) and general registers (GRA to GRD). TCNT is a 16-bit
counter that increments the count each time a clock pulse is input, and that can operate as a
free-running counter or an external event counter. GRA to GRD can be used for input capture
or output compare.
• Buffer Operation
If a compare match is generated when a GR is used as an output compare register, , the
corresponding buffer register value is transferred to the GR. If input capture is generated when
a GR is used as an input capture register, the GR value is transferred to the buffer register and
the TCNT value is transferred to the GR.
• PWM Mode
PWM waveforms are output from the FTIOB, FTIOC, and FTIOD pins. The period can be
specified in the GRA, and the duty ratio can be varied from 0% to 100% depending on the
settings of GRB to GRD. When an output pin is set to PWM mode, the corresponding GR
automatically becomes an output compare register.
208
Bus interface
TCRW
Module
data bus
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