Hitachi H8/3664 Hardware Manual page 9

6.2 Register Descriptions.......................................................................................................... 82
6.2.1 System Control Register 1 (SYSCR1) .................................................................. 82
6.2.2 System Control Register 2 (SYSCR2) .................................................................. 83
6.2.3 Module Standby Control Register 1 (MSTCR1) .................................................. 85
6.3 Mode Transition Conditions............................................................................................... 87
6.4 Sleep Mode......................................................................................................................... 90
6.4.1 Transition to the Sleep Mode ................................................................................ 90
6.4.2 Clearing the Sleep Mode ....................................................................................... 90
6.5 Standby Mode .................................................................................................................... 90
6.5.1 Transition to the Standby Mode............................................................................ 90
6.5.2 Clearing the Standby Mode................................................................................... 91
6.5.3 Oscillator Settling Time after the Standby Mode is Cleared ................................ 91
6.6 Subsleep Mode ................................................................................................................... 92
6.6.1 Transition to the Subsleep Mode .......................................................................... 92
6.6.2 Clearing the Subsleep Mode ................................................................................. 92
6.7 Subactive Mode.................................................................................................................. 93
6.7.1 Transition to the Subactive Mode ......................................................................... 93
6.7.2 Clearing the Subactive Mode ................................................................................ 93
6.8 Active Mode ....................................................................................................................... 94
6.8.1 Transition to the Active Mode .............................................................................. 94
6.8.2 Transition from the Active Mode to Other Modes................................................ 94
6.8.3 Operating Frequency in the Active Mode ............................................................. 94
6.9 Direct Transition ................................................................................................................ 95
6.9.1 Direct Transition Time.......................................................................................... 95
6.10 Module Standby Mode ....................................................................................................... 96
Section 7 ROM
7.1 Features .............................................................................................................................. 97
7.2 Overview ............................................................................................................................ 98
7.2.1 Block Diagram ...................................................................................................... 98
7.2.2 On-board Programming Mode .............................................................................. 99
7.2.3 Block Configuration.............................................................................................. 103
7.2.4 Pin Configuration .................................................................................................. 103
7.2.5 Register Configuration .......................................................................................... 104
7.3 Register Descriptions.......................................................................................................... 104
7.3.1 Flash Memory Control Register 1 (FLMCR1)...................................................... 104
7.3.2 Flash Memory Control Register 2 (FLMCR2)...................................................... 106
7.3.3 Erase Block Register 1 (EBR1) ............................................................................ 107
7.3.4 Flash Memory Power Control Register (FLPWCR) ............................................. 108
7.3.5 Flash Memory Enable Register (FENR) ............................................................... 108
7.4 Boot Mode.......................................................................................................................... 109
7.4.1 Automatic SCI Bit Rate Adjustment..................................................................... 111
7.4.2 Programming Control Program Area .................................................................... 111
.................................................................................................................... 97
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