Hitachi H8/3664 Hardware Manual page 321

TDRE Description
0 [Clearing conditions]
•
When transmit data is written in ICDR (ICDRT) in transmit mode (TRS = 1)
•
When a stop condition is detected in the bus line state after a stop condition is
issued with the I
•
When a stop condition is detected with the I
•
In receive mode (TRS = 0)
(A 0 write to TRS during transfer is valid after reception of a frame containing an
acknowledge bit)
1 [Setting conditions]
•
In transmit mode (TRS = 1), when a start condition is detected in the bus line state
after a start condition is issued in master mode with the I
format selected
•
When data is transferred from ICDRT to ICDRS
(Data transfer from ICDRT to ICDRS when TRS = 1 and TDRE = 0, and ICDRS is
empty)
•
When a switch is made from receive mode (TRS = 0) to transmit mode (TRS = 1 )
after detection of a start condition
RDRF Description
0 [Clearing condition]
When ICDR (ICDRR) receive data is read in receive mode
1 [Setting condition]
When data is transferred from ICDRS to ICDRR
(Data transfer from ICDRS to ICDRR in case of normal termination with TRS = 0 and
RDRF = 0)
2
C bus format or serial format selected
2
C bus format selected
2
C bus format or serial
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