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Example 2: BSET instruction executed designating port 5
P5
and P5
are designated as input pins, with a low-level signal input at P5
7
6
signal input at P5
. The remaining pins, P5
6
this example, the BSET instruction is used to change pin P5
[A: Prior to executing BSET]
P5
Input/output
Input
Pin state
Low
level
PCR5
0
PDR5
1
[B: BSET instruction executed]
BSET
#0,
[C: After executing BSET]
P5
Input/output
Input
Pin state
Low
level
PCR5
0
PDR5
0
[D: Explanation of how BSET operates]
When the BSET instruction is executed, first the CPU reads port 5.
Since P5
and P5
are input pins, the CPU reads the pin states (low-level and high-level input).
7
6
P5
to P5
are output pins, so the CPU reads the value in PDR5. In this example PDR5 has a value
5
0
of H'80, but the value read by the CPU is H'40.
Next, the CPU sets bit 0 of the read data to 1, changing the PDR5 data to H'41. Finally, the CPU
writes this value (H'41) to PDR5, completing execution of BSET.
As a result of this operation, bit 0 in PDR5 becomes 1, and P5
However, bits 7 and 6 of PDR5 end up with different values.
44
P5
P5
7
6
Input
Output
High
Low
level
level
0
1
0
0
@PDR5
The BSET instruction is executed designating port 5.
P5
P5
7
6
Input
Output
High
Low
level
level
0
1
1
0
to P5
, are output pins and output low-level signals. In
5
0
0
P5
P5
5
4
Output
Output
Low
Low
level
level
1
1
0
0
P5
P5
5
4
Output
Output
Low
Low
level
level
1
1
0
0
and a high-level
7
to high-level output.
P5
P5
3
2
Output
Output
Low
Low
level
level
1
1
0
0
P5
P5
3
2
Output
Output
Low
Low
level
level
1
1
0
0
outputs a high-level signal.
0
P5
1
0
Output
Low
level
1
0
P5
1
0
Output
High
level
1
1
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