Program/Program-Verify - Hitachi H8/3664 Hardware Manual

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Notes: 1. Operation is not guaranteed if bits SWE, ESU, PSU, EV, PV, E, and P of FLMCR1 are
set/reset by a program in flash memory in the corresponding address areas.
7.6.1

Program/Program-Verify

To write to flash memory, follow the program/program-verify flowchart shown in figure 7.9.
Performing programming operations according to this flowchart will enable flash memory to be
programmed without subjecting the device to voltage stress or sacrificing data reliability.
1. Perform programming in the erased state. Do not reprogram addresses that have already been
programmed.
2. The unit for one programming operation is 128 bytes. A 128-byte data transfer must be
performed even if writing fewer than 128 bytes of data; in this case, write H'FF data to
addresses that do not need to be programmed.
3. Provide a 128-byte program data area, 128-byte reprogram data area, and 128-byte additional-
program data area in RAM. Refer to tables 7.5 and 7.6 for reprogram data and additional-
program data computation.
4. Write 128 bytes successively in byte units from the reprogram data area or additional-program
data area to flash memory. The program address and 128-byte data are latched in the flash
memory. The lower 8 bits of the flash memory start address must be H'00 or H'80.
5. The time during which the P bit is set is the programming time. Set the programming time
according to table 7.7.
6. A watchdog timer setting is made to prevent overprogramming due to program runaway, etc.
Set an overflow period of around 6.6 ms.
7. For the dummy write to verify addresses, write one H'FF byte to addresses with b'00 in the
lower 2 bits. Verify data can be read in longword format from the address on which the
dummy write was executed.
8. Do not repeat the program/program-verify sequence more than 1,000 times on the same bit.
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