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3.5.4
Interrupt Response Time
Table 3.4 shows the number of wait states after an interrupt request flag is set until the first
instruction of the interrupt handling-routine is executed.
Table 3.4
Interrupt Wait States
Item
Waiting time for completion of executing instruction*
Saving of PC and CCR to stack
Vector fetch
Instruction fetch
Internal processing
Total
Note: * Not including EEPMOV instruction.
3.6
Trap Instruction
When a TRAP instruction is executed, trap instruction exception handling starts up. A TRAP
instruction generates vector addresses corresponding to the vector numbers 0 to 3 designated in the
instruction code.
3.7
Application Notes
3.7.1
Notes on Stack Area Use
When word data is accessed in the H8/3664 Series, the least significant bit of the address is
regarded as 0. Access to the stack always takes place in word size, so the stack pointer (SP: R7)
should never indicate an odd address. Use PUSH Rn (MOV.W Rn, @–SP) or POP Rn (MOV.W
@SP+, Rn) to save or restore register values.
Setting an odd address in SP may cause a program to crash. An example is shown in figure 3.4.
62
States
1 to 13
4
2
4
4
15 to 27
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