Hitachi H8/3664 Hardware Manual page 143

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A15–A0
CE
CE
OE
OE
WE
I/O7–I/O0
Note: Data is latched on the rising edge of WE.
Figure 7.14 Timing Waveforms for Memory Read after Memory Write
Table 7.15 AC Characteristics in Transition from Memory Read Mode to Another Mode
(Conditions: V
Item
Command write cycle
CE hold time
CE setup time
Data hold time
Data setup time
Write pulse width
WE rise time
WE fall time
Command write
t
t
ces
ceh
t
wep
t
t
f
f
t
t
ds
dh
= 5.0 V ±0.5 V, V
CC
Symbol
Min
t
20
nxtc
t
0
ceh
t
0
ces
t
50
dh
t
50
ds
t
70
wep
t
r
t
f
Memory read mode
Address stable
t
nxtc
= 0 V, T
= 25°C ±5°C)
SS
a
Max
30
30
Unit
Notes
µs
Figure 7.15
ns
ns
ns
ns
ns
ns
ns
127

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