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14 8-BIT OSC1 TIMER (T8OSC1)
0x50c4: 8-bit OSC1 Timer Interrupt Flag Register (T8OSC1_IFLG)
Register name Address
Bit
8-bit OSC1
0x50c4
D7–1 –
Timer Interrupt
(8 bits)
D0
Flag Register
(T8OSC1_IFLG)
D[7:1]
Reserved
D0
T8OIF: 8-bit OSC1 Timer Interrupt Flag
This is the interrupt flag to indicate the compare match interrupt cause occurrence status.
1 (R):
Cause of interrupt has occurred
0 (R):
No cause of interrupt has occurred (default)
1 (W):
Flag is reset
0 (W):
Has no effect
T8OIF is the interrupt flag for the T8OSC1 module. The interrupt flag is set to 1 when the count
of the counter matches the set value of the compare data register during count-up if T8OIE (D0/
T8OSC1_IMSK register) has been set to 1. At the same time, the 8-bit OSC1 timer interrupt request
signal is output to the ITC. The interrupt request signal sets the 8-bit OSC1 timer interrupt flag in the
ITC to 1 and an interrupt occurs if other interrupt conditions meet the ITC and S1C17 Core settings.
The settings shown below are required to manage the cause-of-interrupt occurrence status using this
register.
1. Set the 8-bit OSC1 timer interrupt trigger mode in the ITC to level trigger.
2. After an interrupt occurs, reset the T8OIF interrupt flag of the T8OSC1 module in the interrupt
handler routine (this also resets the interrupt flag in the ITC).
The T8OIF flag is reset by writing 1.
Note: To avoid occurrence of unnecessary interrupts, be sure to reset the T8OIF flag before the
compare match interrupt is enabled using T8OIE (D0/T8OSC1_IMSK register).
14-14
Name
Function
reserved
T8OIF
8-bit OSC1 timer interrupt flag
Setting
–
1 Cause of
0 Cause of
interrupt
occurred
EPSON
Init. R/W
Remarks
–
–
0 when being read.
0
R/W Reset by writing 1.
interrupt not
occurred
S1C17704 TECHNICAL MANUAL
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