Epson S1C17704 Technical Manual page 405

Cmos 16-bit single chip microcomputer
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0x5215–0x52a3
Register name Address
Bit
P1 Port
0x5215
D7–0 P1IE[7:0]
Interrupt Mask
(8 bits)
Register
(P1_IMSK)
P1 Port
0x5216
D7–0 P1EDGE[7:0] P1[7:0] port interrupt edge select
Interrupt Edge
(8 bits)
Select Register
(P1_EDGE)
P1 Port
0x5217
D7–0 P1IF[7:0]
Interrupt Flag
(8 bits)
Register
(P1_IFLG)
P2 Port Input
0x5220
D7–0 P2IN[7:0]
Data Register
(8 bits)
(P2_IN)
P2 Port Output
0x5221
D7–0 P2OUT[7:0] P2[7:0] port output data
Data Register
(8 bits)
(P2_OUT)
P2 Port
0x5222
D7–0 P2IO[7:0]
I/O Direction
(8 bits)
Control Register
(P2_IO)
P2 Port Pull-up
0x5223
D7–0 P2PU[7:0]
Control Register
(8 bits)
(P2_PU)
P2 Port Schmitt
0x5224
D7–0 P2SM[7:0]
Trigger Control
(8 bits)
Register
(P2_SM)
P3 Port Input
0x5230
D7–4 –
Data Register
(8 bits)
D3–0 P3IN[3:0]
(P3_IN)
P3 Port Output
0x5231
D7–4 –
Data Register
(8 bits)
D3–0 P3OUT[3:0] P3[3:0] port output data
(P3_OUT)
P3 Port
0x5232
D7–4 –
I/O Direction
(8 bits)
D3–0 P3IO[3:0]
Control Register
(P3_IO)
P3 Port Pull-up
0x5233
D7–4 –
Control Register
(8 bits)
D3–0 P3PU[3:0]
(P3_PU)
P3 Port Schmitt
0x5234
D7–4 –
Trigger Control
(8 bits)
D3–0 P3SM[3:0]
Register
(P3_SM)
P0 Port
0x52a0
D7–6 –
Function Select
(8 bits)
D5
Register
D4
(P0_PMUX)
D3–0 –
P1 Port
0x52a1
D7
Function Select
D6
(8 bits)
Register
D5
D4
(P1_PMUX)
D3
D2–0 –
P2 Port
0x52a2
D7
Function Select
(8 bits)
D6
Register
D5
(P2_PMUX)
D4
D3
D2
D1
D0
P3 Port
0x52a3
D7–4 –
Function Select
(8 bits)
D3
Register
D2
(P3_PMUX)
D1
D0
S1C17704 TECHNICAL MANUAL
Name
Function
P1[7:0] port interrupt enable
P1[7:0] port interrupt flag
P2[7:0] port input data
P2[7:0] port I/O direction select
P2[7:0] port pull-up enable
P2[7:0] port Schmitt trigger input
enable
reserved
P3[3:0] port input data
reserved
reserved
P3[3:0] port I/O direction select
reserved
P3[3:0] port pull-up enable
reserved
P3[3:0] port Schmitt trigger input
enable
reserved
P05MUX
P05 port function select
P04MUX
P04 port function select
reserved
P17MUX
P17 port function select
reserved
P15MUX
P15 port function select
P14MUX
P14 port function select
P13MUX
P13 port function select
reserved
P27MUX
P27 port function select
P26MUX
P26 port function select
P25MUX
P25 port function select
P24MUX
P24 port function select
P23MUX
P23 port function select
P22MUX
P22 port function select
P21MUX
P21 port function select
P20MUX
P20 port function select
reserved
P33MUX
P33 port function select
P32MUX
P32 port function select
P31MUX
P31 port function select
P30MUX
P30 port function select
EPSON
APPENDIX A LIST OF I/O REGISTERS
P Port & Port MUX
Setting
Init. R/W
1 Enable
0 Disable
1 Falling edge 0 Rising edge
1 Cause of
0 Cause of
interrupt
interrupt not
occurred
occurred
1 1 (H)
0 0 (L)
1 1 (H)
0 0 (L)
1 Output
0 Input
1 Enable
0 Disable
(0xff)
1 Enable
0 Disable
(Schmitt)
(CMOS)
(0xff)
1 1 (H)
0 0 (L)
1 1 (H)
0 0 (L)
1 Output
0 Input
1 Enable
0 Disable
(0xff)
1 Enable
0 Disable
(Schmitt)
(CMOS)
(0xff)
1 REMO
0 P05
1 REMI
0 P04
1 #SPISS
0 P17
1 SCL
0 P15
1 SDA
0 P14
1 FOUT1
0 P13
1 EXCL3
0 P27
1 TOUT
0 P26
1 SCLK
0 P25
1 SOUT
0 P24
1 SIN
0 P23
1 SPICLK
0 P22
1 SDO
0 P21
1 SDI
0 P20
1 P33
0 DSIO
1 P32
0 DST2
1 P31
0 DCLK
1 FOUT3
0 P30
Remarks
0
R/W
0
R/W
0
R/W Reset by writing 1.
×
R
0
R/W
0
R/W
1
R/W
1
R/W
0 when being read.
×
R
0 when being read.
0
R/W
0 when being read.
0
R/W
0 when being read.
1
R/W
0 when being read.
1
R/W
0 when being read.
0
R/W
0
R/W
0 when being read.
0
R/W
0 when being read.
0
R/W
0
R/W
0
R/W
0 when being read.
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0 when being read.
0
R/W
0
R/W
0
R/W
0
R/W
AP-23

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