Epson S1C17704 Technical Manual page 85

Cmos 16-bit single chip microcomputer
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Stable oscillation wait time when OSC3 starts oscillating
The OSC3 oscillator circuit provides an oscillation stabilization-wait timer to prevent malfunctions caused by
an unstable clock immediately after the OSC3 oscillator starts oscillating such as when the power is turned
on, when the S1C17 Core is woken from SLEEP mode or when software turns the OSC3 oscillator circuit on.
The OSC3 clock supply is disabled until the time set to the timer has elapsed after the OSC3 oscillator starts
oscillating.
The stable oscillation wait time can be selected from four kinds of number of clock cycles using OSC3WT[1:0]
(D[5:4]/OSC_CTL register).
∗ OSC3WT[1:0]: OSC3 Wait Cycle Select Bits in the Oscillation Control (OSC_CTL) Register (D[5:4]/0x5061)
The stable oscillation wait time is set to 1024 OSC3 clock cycles at initial reset, the S1C17 Core does not start
operating until the set time has elapsed after releasing reset status.
Note: The oscillation start time varies depending on the resonator and externally attached parts. Set
the stable oscillation wait time with a safety margin. Refer to the oscillation start time example
described in Chapter 26, "Electrical Characteristics."
S1C17704 TECHNICAL MANUAL
Table 7.2.2 Setting Stable Oscillation Wait Time
OSC3WT[1:0]
Stable oscillation wait time
0x3
0x2
0x1
0x0
EPSON
128 cycles
256 cycles
512 cycles
1024 cycles
(Default: 0x0)
7 OSCILLATOR (OSC)
7-3

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